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CY7C263-25WC

  • CY7C263-25WC
  • CY7C263-25WC
CY7C263-25WC
E-PROMS
CYPRESS SEMICONDUCTOR
EPROM UV 64K-Bi
-
YES
8K x 8 Power-Switched and Reprogrammable PROM
CY7C261
CY7C263/CY7C264
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600
Document #: 38-04010 Rev. *B Revised December 28, 2002
1
Features
CMOS for optimum speed/power
Windowed for reprogrammability
High speed
20 ns (Commercial)
25 ns (Military)
Low power
660 mW (Commercial)
770 mW (Military)
Super low standby power (7C261)
Less than 220 mW when deselected
Fast access: 20 ns
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil packaging available
5V ± 10% V
CC
, commercial and military
Capable of withstanding greater than 2001V static
discharge
TTL-compatible I/O
Direct replacement for bipolar PROMs
Functional Description
The CY7C261, CY7C263, and CY7C264 are high-perfor-
mance 8192-word by 8-bit CMOS PROMs. When deselected,
the CY7C261 automatically powers down into a low-power
standby mode. It is packaged in a 300-mil-wide package. The
CY7C263 and CY7C264 are packaged in 300-mil-wide and
600-mil-wide packages respectively, and do not power down
when deselected. The reprogrammable packages are
equipped with an erasure window; when exposed to UV light,
these PROMs are erased and can then be reprogrammed.
The memory cells utilize proven EPROM floating-gate
technology and byte-wide intelligent programming algorithms.
The CY7C261, CY7C263, and CY7C264 are plug-in replace-
ments for bipolar devices and offer the advantages of lower
power, superior performance and programming yield. The
EPROM cell requires only 12.5V for the supervoltage and low
current requirements allow for gang programming. The
EPROM cells allow for each memory location to be tested
100%, as each location is written into, erased, and repeatedly
exercised prior to encapsulation. Each PROM is also tested
for AC performance to guarantee that after customer
programming the product will meet DC and AC specification
limits.
Read is accomplished by placing an active LOW signal on CS
.
The contents of the memory location addressed by the
address line (A
0
A
12
) will become available on the output lines
(O
0
O
7
).
For an 8K x 8 Registered PROM, see theCY7C265.
Logic Block Diagram Pin Configurations
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
ADDRESS
DECODER
PROGRAM-
MABLE
ARRAY
COLUMN
MULTI-
PLEXER
POWER DOWN
(7C261)
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
8
A
9
A
10
A
11
A
12
CS
GND
1
2
3
4
5
6
7
8
9
10
11 14
15
16
20
19
18
17
21
24
23
22
Top View
DIP/Flatpack
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
A
7
O
3
V
CC
A
8
A
9
A
10
O
7
O
6
O
5
O
4
CS
O
2
12 13
O
1
A
12
A
11
28
4
5
6
7
8
9
10
321 27
1314151617
26
25
24
23
22
21
20
11
12
19
A
5
V
CC
GND
A
6
A
7
O
3
O
1
O
0
Top View
18
O
4
O
5
NC
A
0
A
4
A
3
A
10
NC
A
8
A
9
NC
NC
CS
A
11
O
7
O
6
7C261
7C263
7C264
7C261
7C263
A
7
A
2
A
1
A
12
O
2
COLUMN
ADDRESS
ROW
ADDRESS
LCC/PLCC (Opaque Only)
CY7C261
CY7C263/CY7C264
Document #: 38-04010 Rev. *B Page 2 of 14
Maximum Ratings
[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperatures .................................–65°C to+150°C
Ambient Temperature with
Power Applied..............................................55°C to+125°C
Supply Voltage to Ground Potential
(Pin 24 to Pin 12)............................................–0.5V to+7.0V
DC Voltage Applied to Outputs
in High Z State ................................................–0.5V to+7.0V
DC Input Voltage........................................... –3.0V to + 7.0V
DC Program Voltage
(Pin 19 DIP, Pin 23 LCC) ..............................................13.0V
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
UV Exposure ................................................ 7258 Wsec/cm
2
Selection Guide
7C261-20
7C263-20
7C264-20
7C261-25
7C263-25
7C264-25
7C261-35
7C263-35
7C264-35
7C261-45
7C263-45
7C264-45
7C261-55
7C263-55
7C264-55 Unit
Maximum Access Time 20 25 35 45 55 ns
Maximum Operating
Current
Commercial 120 120 100 100 100 mA
Military 140 120 120 120 mA
Maximum Standby
Current (7C261 only)
Commercial 40 40 30 30 30 mA
Military 40 30 30 30 mA
Operating Range
Range
Ambient
Temperature V
CC
Commercial 0°C to + 70°C 5V ± 10%
Military
[2]
–55°C to + 125°C 5V ± 10%
Notes:
1. The volatge on any input or I/O pin cannot exceed the power pin during
power-up.
2. T
A
is the “instant on” case temperature.
CY7C261
CY7C263/CY7C264
Document #: 38-04010 Rev. *B Page 3 of 14
Electrical Characteristics Over the Operating Range
[3,4]
7C261-20, 25
7C263-20, 25
7C264-20, 25
7C261-35, 45, 55
7C263-35, 45, 55
7C264-35, 45, 55
Parameter Description Test Conditions Min. Max. Min. Max. Unit
V
OH
Output HIGH Voltage V
CC
= Min., I
OH
= –2.0 mA 2.4 V
V
OH
Output HIGH Voltage V
CC
= Min., I
OH
= –4.0 mA 2.4 V
V
OL
Output LOW Voltage V
CC
= Min., I
OL
= 8 mA
(6 mA Mil)
0.4 V
V
OL
Output LOW Voltage V
CC
= Min., I
OL
= 16 mA 0.4 V
V
IH
Input HIGH Level 2.0 2.0 V
V
IL
Input LOW Level 0.8 0.8 V
I
IX
Input Current GND < V
IN
< V
CC
–10 +10 –10 +10 µA
V
CD
Input Diode Clamp Voltage Note 4 Note 4
I
OZ
Output Leakage Current GND < V
OUT
< V
CC
Output Disabled
Com’l –10 +10 –10 +10 µA
Mil –40 +40 –40 +40 µA
I
OS
Output Short Circuit Current
[5]
V
CC
= Max., V
OUT
= GND –20 –90 –20 –90 mA
I
CC
Power Supply Current V
CC
= Max., f = Max.
I
OUT
= 0 mA
Com’l 120 100 mA
Mil 140 120
I
SB
Standby Supply Current (7C261) V
CC
= Max.,
CS
> V
IH
Com’l 40 30 mA
Mil 40 30
V
PP
Programming Supply Voltage 12 13 12 13 V
I
PP
Programming Supply Current 50 50 mA
V
IHP
Input HIGH Programming Voltage 4.75 4.75 V
V
ILP
Input LOW Programming Voltage 0.4 0.4 V
Capacitance
[4]
Parameter Description Test Conditions Max. Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= 5.0V
10 pF
C
OUT
Output Capacitance 10 pF
Notes:
3. See the last page of this specification for Group A subgroup testing information.
4. See the “Introduction to CMOS PROMs” section of the Cypress Data Book for general information on testing.
5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.]

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